Text preview for : icf11-12.pdf part of ICOM IC-F11/F12 Service manual for ICOM F11/F12



Back to : icf11-12.pdf | Home

SERVICE
MANUAL


VHF TRANSCEIVERS
INTRODUCTION
This service manual describes the latest service information
for the IC-F11/IC-F11S/IC-F11BR/IC-F12/IC-F12S at the
time of publication.

To upgrade quality, all electrical or mechanical parts and
internal circuits are subject to change without notice or oblig-
ation.




DANGER
NEVER connect the transceiver to an AC outlet or to a DC
power supply that uses more than 16 V. Such a connection
could cause a fire hazard and/or electric shock.

DO NOT expose the transceiver to rain, snow or any liquids.

DO NOT reverse the polarities of the power supply when con-
necting the transceiver.

DO NOT apply an RF signal of more than 20 dBm (100mW)
to the antenna connector. This could damage the transceiv-
er's front end.




ORDERING PARTS
Be sure to include the following four points when ordering
replacement parts:

1. 10-digit order numbers
2. Component part number and name
3. Equipment model name and unit name
4. Quantity required

IC-F11/IC-F12 IC-F11BR/IC-F11S/
1130007020 S.IC TC7S66FU IC-F11 MAIN UNIT 1 piece IC-F12S
8810009510 Screw BO M 2 x 4 NI-ZU IC-F11 Chassis 10 pieces

Addresses are provided on the inside back cover for your
convenience.




REPAIR NOTES
1. Make sure a problem is internal before disassembling the transceiver.
2. DO NOT open the transceiver until the transceiver is disconnected from its power source.
3. DO NOT force any of the variable components. Turn them slowly and smoothly.
4. DO NOT short any circuits or electronic parts. An insulated turning tool MUST be used for all adjustments.
5. DO NOT keep power ON for a long time when the transceiver is defective.
6. DO NOT transmit power into a signal generator or a sweep generator.
7. ALWAYS connect a 40 dB to 50 dB attenuator between the transceiver and a deviation meter or spectrum analyzer when
using such test equipment.
8. READ the instructions of test equipment thoroughly before connecting equipment to the transceiver.
TABLE OF CONTENTS


SECTION 1 SPECIFICATIONS

SECTION 2 INSIDE VIEWS

SECTION 3 DISASSEMBLY INSTRUCTIONS

SECTION 4 CIRCUIT DESCRIPTION
4-1 RECEIVER CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1
4-2 TRANSMITTER CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-2
4-3 PLL CIRCUIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-3
4-4 POWER SUPPLY CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-4
4-5 PORT ALLOCATIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-4


SECTION 5 ADJUSTMENT PROCEDURES
5-1 PREPARATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1
5-2 PLL ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-4
5-3 SOFTWARE ADJUSTMENT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-5


SECTION 6 PARTS LIST

SECTION 7 MECHANICAL PARTS AND DISASSEMBLY

SECTION 8 SEMI-CONDUCTOR INFORMATION

SECTION 9 BOARD LAYOUTS
9-1 MAIN UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9-1
9-2 SW-A AND SW-B UNITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9-3


SECTION 10 BC-146 OPTIONAL DESKTOP CHARGER INFORMATION
10-1 PARTS LIST . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10-1
10-2 DISASSEMBLY INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10-1
10-3 VOLTAGE DIAGRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10-2
10-4 BOARD LAYOUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10-2


SECTION 11 BLOCK DIAGRAM

SECTION 12 VOLTAGE DIAGRAM
12-1 MAIN UNIT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12-1
12-2 SW-A AND SW-B UNITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12-2
SECTION 1 SPECIFICATIONS

EIA-152-C/204D or TIA-603 ETS 300 086
151.505 MHz­158.4075 MHz [F11BR] only
Frequency coverage 146.000 MHz­174.000 MHz
146.000 MHz­174.000 MHz
Type of emission 16K0F3E (at 25 kHz / 30 kHz), 8K50F3E (at 12.5 kHz)
Number of channels 2 channel (IC-F11BR / F11S / F12S), 16 channel (IC-F11 / F12)
Power supply requirement 7.2 V (negative ground)
Antenna impedance 50 normal
Input impedance (Mic) 2.2 k normal
8 normal
GENERAL




Output impedance (Audio)
Intermediate frequency 1st: 31.050 MHz, 2nd: 450 kHz
Operating temperature range ­30 °C to +60 °C (­22°F to +140°F) ­25 °C to +55 °C (­13°F to +131°F)
High power 1.6 A (5 W) except [F11BR], 1.1 A (2 W) [F11BR] only
Current drain




Tx
(at 7.2 V)




Low power 0.7 A (1 W)
stand-by 70 mA
Rx
Rated audio 250 mA
Dimensions 54(W) × 128(H) × 37(D) mm; 21/8(W) × 51/25(H) × 115/32(D) inch
(Projections not included)
Weight 310 g; 10.1 oz (with BP-209), 300 g; 10.6 oz (with BP-222)
RF output power (at 7.2 V DC) High: 5.0 W ([F11BR]: 2.0 W), Low1: 2.0 W (except [F11BR]), low2: 1.0 W
Modulation system Variable reactance frequency modulation
Max. permissible deviation ± 5.0 kHz (25 kHz), ± 2.5 kHz (12.5 kHz)
External mic.connector 3-conductor 2.5 mm (1/10 in) (2 k)
TRANSMITTER




Frequency error ±5.0 ppm ±2.0 kHz (25 kHz), ± 1.5 kHz (12.5 kHz)
Spurious emissions 73 dBc (typical) 0.25 µW @ < 1 GHz, 1.00 µW > 1 GHz
Adjacent channel power 70 dB*1 (25 kHz), 60 dB*1 (12.5 kHz)
Audio harmonics distortion 3 % typical at 1 kHz, 40 % deviation 5 % typical at 1 kHz 60 % deviation
FM Hum and noise 46 dB typ. (25 kHz), 40 dB typ. (12.5 kHz) ­
Residual modulation ­ 45 dB typ. (25 kHz), 43 dB typ. (12.5 kHz)
Limiting charact of modulator 70 % ­ 100 % of max. deviation
Receive system Double-conversion super heterodyne
Intermediate frequencies 1st: 31.050 MHz, 2nd 450 kHz
0.25 µV (typical) for 12 dB SINAD
Sensitivity 0.25 µV (typical) for 12 dB SINAD
RECEIVER




0.63 µV EMF (typical) for 20 dB SINAD
Audio output power (at 7.2 V) 0.5 W at 5 % distortion with an 8 load, 0.6 W at 5 % distortion with 6 load
Adjacent channel selectivity 70 dB typ. (25 kHz), 65 dB typ. (12.5 kHz) 70 dB typ (25 kHz), 60 dB typ. (12.5 kHz)
Spurious response 70 dB*1
Intermodulation 70 dB 65 dB
FM Hum and noise (Typical) 46 dB*2 (25 kHz), 40 dB*2 (12.5 kHz) 45 dB*3 (25 kHz), 43 dB*3 (12.5 kHz)
Squelch sensitivity 0.3 µV typical at threshold
* EIA-152-C/204D or TIA-603 is typical value, * EIA-152-C/204D only, *3With CCITT filter
1 2




All stated specifications are subject to change without notice or obligation.




1-1
SECTION 2 INSIDE VIEWS

· MAIN UNIT




TOP VIEW BOTTOM VIEW

Antenna switching circuit

(D1: 1SV307
D9: ISV307
D10: MA77
)

Power amplifier
(Q1: 2SK2974) APC
(IC2: TA75S01F)
Pre-drive RF amplifier
(Q2 : 2SK2973) (Q15: 3SK294)
AF amplifier
(IC4: TA7368F)
Analog switch
YGR amplifier (IC6: BU4066BCFV)
(Q4: 2SC5110 O) D/A converter
TX/RX switch (IC9: M62363FP-650C)
(D3, D4: MA77)
1st mixer
(Q16: 3SK272)

Crystal filter
VCO circuit (FI1: FL-311)
FM IF IC
PLL reference oscillator
(IC3: TA31136FN)
(X1: CR-664A)

PLL IC
(IC1: MB15A02PFV-1)
CPU
(IC7: HD6433664A24FP)



Low-pass filter circuit
(IC12,16: NJM12904V) EEPROM
(IC11: BR24C16FV-E2)
Expander IC
(IC15: BU4094BCFV)




2-1
SECTION 3 DISASSEMBLY INSTRUCTIONS


· REMOVING THE CHASSIS
¡ Unscrew 1 nut, A, and remove 2 knobs, B, C.
TM Unscrew 2 screws, D.
£ Unscrew 2 screws, H, to separate the Jack panel and the
Front panel.
¢ Take off the chassis in the direction of the arrow.
Unplug J6 to separate the front panel and the chassis. D (Black, 2mm) x 2


Chassis




C
B
J6 (Speaker connector)




A



Jack panel


Front panel


H (Black, 2mm) x 2


· REMOVING THE MAIN UNIT
¡ Remove the searing rubber.
TM Unsolder 2 points, E, and unscrew 2 nuts, F.
£ Unscrew 9 screws, G, (silver, 2mm) to separate the chassis and the MAIN unit.
¢ Take off the MAIN unit in the direction of the arrow.



G
G ([F11BR], [F11S], [F12S] only)


Side plate
G


G

E




F

Sealing rubber

Chassis
MAIN unit Guide holes




3-1
SECTION 4 CIRCUIT DESCRIPTION

4-1 RECEIVER CIRCUITS The signals from the RF circuit are mixed at the 1st mixer
4-1-1 ANTENNA SWITCHING CIRCUIT (Q16) with a 1st LO signal (114.95­142.95 MHz) coming
from the VCO circuit to produce a 31.05 MHz 1st IF signal.
The antenna switching circuit functions as a low-pass filter
while receiving. However, its impedance becomes very high
The 1st IF signal is applied to a crystal filter (FI1) to sup-
while D9 and D10 are turned ON. Thus transmit signals are
press out-of-band signals. The filtered 1st IF signal is
blocked from entering the receiver circuits. The antenna
applied to the IF amplifier (Q17), then applied to the 2nd
switching circuit employs a /4 type diode switching system.
mixer circuit (IC3, pin 16).
Received signals are passed through the low-pass filter (L1,
L2, C1­C5). The filtered signals are applied to the /4 type
antenna switching circuit (D9, D10). 4-1-4 2ND IF AND DEMODULATOR CIRCUITS
The passed signals are then applied to the RF amplifier cir- The 2nd mixer circuit converts the 1st IF signal into a 2nd IF
cuit. signal. A double conversion superheterodyne system (which
converts receive signals twice) improves the image rejection
ratio and obtains stable receiver gain.
4-1-2 RF CIRCUIT
The 1st IF signal from the IF amplifier is applied to the 2nd
The RF circuit amplifies signals within the range of frequen-
mixer section of the FM IF IC (IC3, pin 16), and is mixed with
cy coverage and filters out-of-band signals.
the 2nd LO signal to be converted into a 450 kHz 2nd IF sig-
nal.
The signals from the antenna switching circuit are amplified
at the RF amplifier (Q15) after passing through the 2 stages
The FM IF IC contains the 2nd mixer, limiter amplifier, quad-
tunable bandpass filter (D12, L21, C104, C105, D13, L54,
rature detector and active filter circuits. A 2nd LO signal
C106, C111, C113). The amplified signals are applied to the
(30.6 MHz) is produced at the PLL circuit by tripling it's ref-
1st mixer circuit (Q16) after out-of-band signals are sup-
erence frequency.
pressed at the 2 stages tunable bandpass filter (D14, C116,
C117, D15, L24, C120, C122).
The 2nd IF signal from the 2nd mixer (IC3, pin 3) passes
through a ceramic filter (FI2) to remove unwanted hetero-
Varactor diodes are employed at the bandpass filters that
dyned frequencies. It is then amplified at the limiter amplifi-
track the filters and are controlled by the CPU (IC7) via the
er (IC3, pin 5) and applied to the quadrature detector (IC3,
D/A convertor (IC9) using T1­T4 signals. These diodes tune
pins 10, 11) to demodulate the 2nd IF signal into AF signals.
the centre frequency of an RF passband for wide bandwidth
receiving and good image response rejection.
4-1-5 AF CIRCUIT
4-1-3 1ST MIXER AND 1ST IF CIRCUITS AF signals from the FM IF IC (IC3, pin 9) are applied to the
analog switch (IC6, pin 1) after being passed through the
The 1st mixer circuit converts the received signal into a fixed
high-pass filter (IC5B, pins 5, 7) via the "DET" signal. The
frequency of the 1st IF signal with a PLL output frequency.
signals pass through the low-pass filter (IC5D, pins 13, 14),
By changing the PLL frequency, only the desired frequency
and then applied to the analog switch (IC6, pins 9, 10) again.
will pass through a crystal filter at the next stage of the 1st
The output signals from the analog swtich (IC6, pin 11) are
mixer.
applied to the AF power amplifier (IC4, pin 4) after being
passed through the [VOL] control (SW-A/SW-B unit; R143)
via the "VOLIN" and "VOLOUT" signals.

2ND IF AND DEMODULATOR CIRCUITS 2nd IF filter
450 kHz
C155 R98 C154 Q18 PLL IC
FI2 2 1
×2 IC1
R99 R100 8 7 5 3 2

Noise Noise
Active detector comp.
filter Mixer X1
Limiter
amp. 15.3 MHz
"SQLIN" signal to the FM
D/A convertor (IC9, pin 23) detector RSSI
IC3 TA31136F
9 10 C140 11 12 13 16
1st IF from the IF amplifier (Q17)
AF signal "DET" R93 "NOIS" signal to the CPU pin 53
R92

C138 C139 "RSSI" signal to the CPU pin 59
R5V
R94
X2




4-1
The applied AF signals are amplified at the AF power ampli- 4-2-2 MODULATION CIRCUIT
fier circuit (IC4, pin 4) to obtain the specified audio level. The The modulation circuit modulates the VCO oscillating signal
amplified AF signals output from pin 10 as "AFOUT"signal (RF signal) using the microphone audio signal.
are applied to the internal speaker (SP1) as the "SP" signal
via the [SP] jack when no plug is connected to the jack.
The audio signals change the reactance of a diode (D6) to
modulate an oscillated signal at the VCO circuit (Q10, Q11).
4-1-6 SQUELCH CIRCUIT The oscillated signal is amplified at the buffer-amplifiers (Q5,
A squelch circuit cuts out AF signals when no RF signals are Q7), then applied to the T/R switching circuit (D3, D4).
received. By detecting noise components in the AF signals,
the squelch switches the AF mute switch.
4-2-3 DRIVE/POWER AMPLIFIER CIRCUITS
A portion of the AF signals from the FM IF IC (IC3, pin 9) as The signal from the VCO circuit passes through the T/R
"DET" signal are applied to the D/A convertor IC (IC9, pin switching circuit (D3) and is amplified at the YGR (Q4), pre-
24). The signals from the D/A convertor (IC9, pin 23) as drive (Q2) and power amplifier (Q1) to obtain 5 W ([F11BR]
"SQLIN" signals are applied to the active filter section (IC3, is 2 W) of RF power (at 7.2 V DC). The amplified signal
pin 8) where noise components are amplified and detected passes through the antenna switching circuit (D1) via the
with an internal noise detector.
power detector (D2), and low-pass filter and is then applied
The active filter section amplifies noise components. The fil- to the antenna connector.
tered signals are rectified at the noise detector section and
converted into "NOIS" (pulse type) signals at the noise com- The bias current of the YGR amplifier (Q4), pre-drive (Q2)
parator section. The "NOIS" signal output from IC3, pin 13, and the power amplifier (Q1) is controlled by the APC circuit.
and is applied to the CPU (IC7, pin 53).

The CPU detects the receiving signal strength from the 4-2-5 APC CIRCUIT
number of the pulses, and outputs "EXST", "SO", "SCK" sig- The APC circuit (IC2) protects the drive and the power
nals. The signals are applied to the expander IC (IC15, pins amplifiers from excessive current drive, and selects HIGH or
1, 2, 3), and then outputs "RMUT" signal from pin 4. This LOW output power.
signal controls the analog switch (IC6, pin 13) to cut the AF
signal line.
The signal output from the power detector circuit (D2) is
applied to the differential amplifier (IC2, pin 3), and the "T4"
signal from the expander (IC9, pin 11), controlled by the
4-2 TRANSMITTER CIRCUITS CPU (IC7), is applied to the other input for reference.
4-2-1 MICROPHONE AMPLIFIER CIRCUIT
The microphone amplifier circuit amplifies audio signals with When the driving current is increased, input voltage of the
+6 dB/octave pre-emphasis characteristics from the micro- differential amplifier (pin 3) will be increased. In such cases,
phone to a level needed for the modulation circuit. the differential amplifier output voltage (pin 4) is decreased
to reduce the driving current.
The AF signals from the microphone are applied to the
microphone amplifier circuit (IC5c, pin 10) after being pass
through the high-pass filter (C186, C187). The amplified AF
signals are passed through the low-pass filter circuit (IC5d,
pins 13, 14) via the mute switch (IC6, pins 2, 3, 4). The fil-
tered AF signals are applied to the modulator circuit after
being passed through the mute switch (IC6, pins 8, 9, 10).
AF CIRCUIT
IC5B "DET" signal
AF 11 1 from IC3, pin 9
Analog HPF
amp.
2, 3 switch 9, 10
IC6 "NWC" signal
IC4 AF VOL.
SP from IC15, pin 14
R1
SW-A/SW-B LPF
Q21
unit
IC5D
APC CIRCUIT
VCC
D1,
T5V
D9,
RF signal D10
from PLL Q4 Q2 Q1
S5V YGR Pre-driver Power ANT
LPF to antenna
amp. amp. amp. SW
APC control circuit
-- D2
TXC
IC2 Power detector
Q14
T4 circuit (D2)
+

4-2
4-3 PLL CIRCUIT The pulse-type signal is converted into DC voltage (lock
4-3-1 GENERAL voltage) at the loop filter (R40­R42, C75, C76), and then
A PLL circuit provides stable oscillation of the transmit fre- applied to varactor diode (D5) of the VCO to stabilize the
quency and receive 1st LO frequency. The PLL output com- oscillated frequency. The lock voltage is also used for the
pares the phase of the divided VCO frequency to the refer- receiver circuit for the bandpass filter center frequency. The
ence frequency. The PLL output frequency is controlled by a lock voltage from the loop filter is amplified at the buffer
crystal oscillator and the divided ratio (N-data) of a pro- amplifier (Q13) and then applied to the CPU (IC7, pin 60).
grammable divider. The signal is analyzed at the CPU, and then applied to the
D/A convertor (IC9). The D/A convertor outputs "T1", "T2",
The PLL circuit, using a one chip PLL IC (IC1), directly gen- "T3", "T4" signals to RF bandpass filters D12­D15 to sup-
erates the transmit frequency and divided ratio based on press harmonic components.
serial data from the CPU and compares the phases of VCO
signals with the reference oscillator frequency. The PLL IC
detects the out-of-step phase and output from pin 5. The ref- 4-3-4 VCO CIRCUIT
erence frequency (15.3 MHz) is oscillated by X1. The VCO outputs from Q11 and Q10 are buffer amplified at
Q7 and Q5, and are then sent to the T/R switch (D3, D4).
The receive LO signal is applied to the 1st mixer circuit
4-3-2 TX LOOP (Q16) through an attenuator, and the tramsmit signal is
The generated signal at the VCO (Q10, Q11, D5, D7) enters applied to the YGR amplifier (Q4). A portion of the VCO out-
the PLL IC (IC1, pin 8) and is divided at the programmable put is reapplied to the PLL IC (IC1, pin 8) via the buffer
divider section and is then applied to the phase detector amplifier (Q6) and low-pass filter (L18, R53, C89­C91).
section.

The phase detector compares the input signal with a refer-
ence frequency, and then outputs the out-of-phase signal
(pulse-type signal) from pin 5.

The pulse-type signal is converted into DC voltage (lock
voltage) at the loop filter (R40­R42, C75, C76), and then
applied to varactor diodes (D5, D7) of the VCO to stabilize
the oscillated frequency.


4-3-3 RX LOOP
The generated signal at the VCO (Q10, Q11, D5, D7) enters
the PLL IC (IC1, pin 8) and is divided at the programmable
divider section and is then applied to the phase detector
section.

The phase detector compares the input signal with a refer-
ence frequency, and then outputs the out-of-phase signal
(pulse-type signal) from pin 5.



PLL CIRCUIT
Buffer D3 to transmitter circuit
"DEV" signal from the MOD
Q5
D/A convertor (IC9, pin 22) D6
VCO Buffer to 1st mixer circuit
Q7 D4

Q10, Q11, D5, D7 Buffer
Loop Q6
filter
IC1 (PLL IC) LPF

5 Phase Programmable 8
Prescaler
detector counter
30.6 MHz signal
Q18 9
to the FM IF IC Programmable SCK
2 Crystal 10
×2 Shift register SO
oscillator divider 11 PLST
X1 1
15.3 MHz




4-3
4-4 POWER SUPPLY CIRCUITS 4-5 PORT ALLOCATIONS
4-5-1 CPU (IC7)
VOLTAGE LINE
Pin Port
LINE DESCRIPTION Description
number name
HV The voltage from the attached battery pack. 7 RES Input port for RESET signal.
The same voltage as the HV line (battery volt- 13 SENC0
VCC age) which is controlled by the power swtich 14 SENC1
([VOL] control). Outputs single tone encode signal.
19 SENC2
Common 5 V converted from the VCC line by the 20 SENC3
+5 regulator circuit (IC10). The output voltage is 23 CENC0
CPU5V
applied to the CPU (IC7), reset circuit (IC8) and 24 CENC1 Outputs CTCSS/DTCS data signal.
etc. 25 CENC2
5 V for transmitter circuits regulated by the T5 Outputs serial clock signal to the PLL
T5V 28 SCK
regulator circuit (Q27). IC (IC1), EEPROM (IC11), etc.
5 V for receiver circuits regulated by the R5 reg- Outputs data signal to the PLL IC
R5V 29 SO
ulator circuit (Q26). (IC1) and D/A convertor (IC9).
Common 5 V converted from the VCC line by the 30 BEEP Outputs beep audio signal.
S5V
S5 regulator circuit (Q24, Q19).
I/O port for strobe signal from/to PLL
The same voltage as the CPU5V line for the ana- 36 PLST
+5V IC (IC9).
log swtich (IC6), buffer amplifier (Q13), etc.
· Outputs strobe signal to the D/A con-
The same voltage as the +5V line for the VCO vertor (IC9).
VCO5V 37 DAST
(Q10, Q11) and buffer amplifiers (Q5­Q7). · Input port for the initial version sig-
nal.
Outputs strobe signal for the expander
38 EXST
IC (IC15).
Input port for [PTT] swtich signal.
39 PTT
High: While [PTT] switch is pushed.
Outputs TX mute control signal.
40 TXC
High: While transmitting
Outputs BUSY LED control signal.
41 RLED
High: While receiving.
Outputs TX LED control signal.
42 TLED
high: While transmitting.
Outputs control signal for the regulator
43 AFON circuit of AF power amplifier.
High: While squelch is open, etc.
I/O port for data signal from/to the
44 ESDA
EEPROM (IC11).
45 CLI Input port for cloning signal.
46 CLO Outputs the cloning signal.
51 F1 Input ports for the customization key
52 F2 signals.
Input port for the noise pulse signal for
53 NOIS
the squelch function.
Input port for PLL unlock signal.
54 UNLK
High: PLL is locked.
Input port for the transceiver's internal
55 TEMP
tempereture detection.
57 CDEC Input port for CTCSS/DTCS signals.
Input port for single tone decode sig-
58 SDEC
nal.
59 RSSI Input port for the RSSI voltage.
60 LVIN Input port for the PLL lock voltage.




4-4
CPU (IC7)­continued
Pin Port
Description
number name
Input port for the battery's type detec-
61 BDET
tion.
62 BATV Input port for battely voltage detection.




4-5-2 OUTPUT EXPANDER IC (IC15)
Pin Port
Description
number name
Outputs clock shift control signal for
4 CSFT
CPU.
5 RMUT Outputs RX mute control signal.
6 MMUT Outputs TX mute control signal.
Outputs low-pass filter cut-off frequen-
7 DUSE cy control signal when DTCS is acti-
vated.
Outputs T5 regulator control signal.
11 T5C
Low: While transmitting.
Outputs R5 regulator control signal.
12 R5C
Low: While receiving.
Outputs S5 regulator control signal.
13 S5C
Low: While power is ON.
Outputs Narrow/Wide of channel
14 NWC spacing control signal.
Low: While Narrow is selected.




4-5-3 D/A CONVERTOR IC (IC9)
Pin Port
Description
number name
2, 3, Output tunable bandpass filters con-
T1­T4
10, 11 trol signals.
Outputs differential voltage for the ref-
14 REF
erence oscillator (Q31, D19, X1).
15 BAL Outputs DTCS balance control signal.
Outputs modulating signal for the
22 DEV
modulator circuit (D6).




4-5
SECTION 5 ADJUSTMENT PROCEDURES

5-1 PREPARATION
When you adjust the contents on page 5-5 or 5-6, SOFTWARE ADJUSTMENT, the optional CS-F11 ADJ ADJUSTMENT SOFTWARE
(Rev. 1.0 or later), OPC-478 CLONING CABLE and a JIG CABLE (see illustration at page 5-2) are required.


s REQUIRED TEST EQUIPMENT
EQUIPMENT GRADE AND RANGE EQUIPMENT GRADE AND RANGE

DC power supply Output voltage : 7.2 V DC Frequency range : 300­3000 Hz
Audio generator
Current capacity : 5 A or more Output level : 1­500 mV
Measuring range : 1­10 W Power attenuation : 40 or 50 dB
RF power meter Frequency range : 300­600 MHz Attenuator
Capacity : 10 W or more
(terminated type) Impedance : 50
SWR : Less than 1.2 : 1 Frequency range : 120­600 MHz
Standard signal
generator (SSG) Output level : 0.1 µV­32 mV
Frequency range : 0.1­600 MHz (­127 to ­17 dBm)
Frequency counter Frequency accuracy : ±1 ppm or better
Sensitivity : 100 mV or better DC voltmeter Input impedance : 50 k/V DC or better

Frequency range : DC­600 MHz Frequency range : DC­20 MHz
FM deviation meter Oscilloscope
Measuring range : 0 to ±5 kHz Measuring range : 0.01­20 V
Digital multimeter Input impedance : 10 M/V DC or better AC millivoltmeter Measuring range : 10 mV­10 V




s SYSTEM REQUIREMENTS s STARTING SOFTWARE ADJUSTMENT
· IBM PC compatible computer with an RS -232C serial port q Connect transceiver and PC with the optional OPC-478
(38400 bps or faster) and the JIG cable.
· Microsoft Windows 95 or Windows 98 w Boot up Windows, and turn the transceiver power ON.
· Intel i486DX processor or faster (Pentium 100 MHz or e Click the program group `CS-F11 ADJ' in the `Programs'
faster recommended) folder of the [Start] menu, then CS-F11 ADJ's window is
· At least 16 MB RAM and 10 MB of hard disk space appeared.
· 640×480 pixel display (800×600 pixel display recommend- r Click `Connect' on the CS-F11's window, then appears
ed) transceiver's up-to-date condition.
t Set or modify adjustment data as desired.


s ADJUSTMENT SOFTWARE INSTALLATION
q Boot up Windows. IBM is a registered trademark of International Bussiness
- Quit all applications when Windows is running. Machines Corporation in the U.S.A. and other countries.
w Insert the cloning software CD-ROM into the appropriate Microsoft and Windows are registered trademarks of
CD-ROM drive. Microsoft Corporation in the U.S.A. and other countries.
e Select `Run' from the [Start] menu. Screen shots produced with permission from Microsoft
r Type the setup program name using the full path name, Corporation. All other products or brands are registered
then push the [Enter] key. (For example; D:\ setup) trademarks or trademarks of their respective holders.
t Follow the prompts.
y Program group `CS-F11' appears in the `Programs' folder
of the [Start] menu.




5-1
SCREEN DISPLAY EXAMPLE




CS-F11 ADJ Rev.1.0
File Option 2
COM 1: OPEN Connect Reload (F5) Disp para
1

[A / D] [D / A]
4 VIN : 197 : C5h : 7.73 V BPF T1 : 90 : 5Ah : 1.76 V
TEMPS : 190 : BEh : 32.23 'C BPF T2 : 45 : 2Dh : 0.88 V 3
5 LVIN : 98 : 62h : 1.92 V BPF T3 : 76 : 4Ch : 1.49 V
SD : 0 : 00h : 0.00 V T4/POW : 60 : 3Ch : 1.18 V
REMOT : 14 : 0Eh : 0.27 V REF : 112 : 70h : 2.20 V
BDET : 255 : FFh : 5.00 V DTCS BL. : 141 : 8Dh : 55.29
Dev : 45 : 2Dh : 0.88 V
SQL Lev : 150 : 96h : 58.96



6 CH No. : 01 (RX Freq = 216.050, TX Freq = < ) RF Power: High
Power (Hi) : 98 [ # # # # # # # # ]
7 Power (L2) : 54 [ # # # # ]
Power (L1) : 255 [ # # # # # # # # # # # # # # # # # # # ]
8 DTCS BAL : 132 [ # # # # # # # # # # ]
MOD W : 92 [ # # # # # # # ]
9
MOD N : 50 [ # # # # ]
10 SQL : 85 [ # # # # # # # ]
11 BPF ALL : [Enter] to sweep
BPF T1 : 23 [ # # # # # # # # # # # # ] [Enter] to sweep
BPF T2 : 22 [ # # # # # # # # ] [Enter] to sweep
12
BPF T3 : 9 [########### ] [Enter] to sweep
BPF T4 : 7 [######### ] [Enter] to sweep
13 TXF : [Enter] to start 14



NOTE: The above values for settings are example only.
Each transceiver has its own specific values for each setting.


1 : Transceiver's connection state 8 : DTCS wave balance
2 : Reload adjustment data 9 : FM deviation
3 : Receive sensitivity measurement 10 : Squelch level
4 : Connected DC voltage 11 : Receive sensitivity (automatically)
5 : PLL lock voltage 12 : Receive sensitivity (manually)
6 : Operating channel select 13 : Reference frequency
7 : RF output power 14 : Adjustment items




JIG CABLE ( + SP)
( SPE)


( GND)

3-conductor 3.5(d) mm plug

to IC-F4GT/GS [SP] jack JIG cable OPC-478

( + CLONE)




5-2
CONNECTION
Standard signal generator to the antenna connector
to [MIC]
0.1 V to 32 mV Audio generator
( 127 dBm to 17 dBm)

CAUTION:
DO NOT transmit while
an SSG is connected to
to an RS-232C port
the antenna connector.
Personal
OPC-478 computer
FM Attenuator
deviation meter 40 dB or 50 dB

RF power meter
0.1 10 W/50 DB9 female plug
(incl. level converter circuit)
Frequency
counter
to [SP]
SINAD meter
JIG cable

Speaker (8 )




DC POWER CABLE CONNECTIONS




+
DC POWER
SUPPLY




GND
Battery type detector




NOTE: When you adjust the output power (high
power), the battery type detector must be con-
nected to GND (see illustration at above).
Ohterwise the transceiver does not transmit high
power, the output power will be low.



5-3
5-2 PLL ADJUSTMENT
MEASUREMENT ADJUSTMENT
ADJUSTMENT ADJUSTMENT CONDITIONS VALUE
UNIT LOCATION UNIT ADJUST
PLL LOCK 1 · Operating frequency: MAIN Connect a digital multi 4.0 V MAIN L16
VOLTAGE 174.000 MHz meter to check point
· Transmitting LV.
2 · Operating frequency: 0.8­1.8 V Verify
146.000 MHz
· Receiving
3 · Transmitting 0.8­1.8 V




RF power meter




L16
PLL lock voltage adjustment




LV
PLL lock voltage check point




TOP VIEW




5-4
5-3 SOFTWARE ADJUSTMENT
Select an operation using [] / [] keys, then set specified value using [] / [] keys on the connected computer keyboard.

MEASUREMENT
ADJUSTMENT ADJUSTMENT CONDITION VALUE
UNIT LOCATION
REFERENCE 1 · Operating frequency: Top Loosely couple a frequnecy 174.0000 MHz*1
FREQUENCY 174.000 MHz*1 panel counter to the antenna connec- 158.4075 MHz*2
[TXF] 158.4075 MHz*2 tor.
· High/Low switch : Low
· Connect the RF power meter or 50
dummy load to the antenna connector.
· Transmitting
OUTPUT 1 · Operating frequency: Top Connect an RF power meter to 5.0 W*1
POWER 146.000 MHz*1 panel the antenna connector. 2.0 W*2
[POWER(Hi)] 151.505 MHz*2
· High/Low switch : High
· Transmitting
[POWER(L2)] 2 · High/Low switch : Low2 2.0 W
· Transmitting
[POWER(L1)] 3 · High/Low switch : Low1 1.0 W
· Transmitting
FM 1 · Operating frequency: Top Connect an FM deviation meter Between ±4.05 kHz
DEVIATION 146.000 MHz*1 panel to the antenna connector and ±4.15 kHz
(Wide) 151.505 MHz*2 through the attenuator.
[MOD W] · High/Low switch : Low1
· Channel spacing : Wide
· Connect the audio generator to the
[MIC] jack and set as:
1.0 kHz/150 mVrms
· Set the FM deviation meter as:
HPF : OFF
LPF : 20 kHz
De-emphasis : OFF
Detector : (P­P)/2
· Transmitting
(Narrow) 2 · Channel spacing : Narrow Between ±2.05 kHz
[MOD N] · Transmitting and ±2.15 kHz
DTCS WAVE 1 · Operating frequency: Top Connect an FM deviation meter Set to flat wave
FORM 174.000 MHz*1 panel with an oscilloscope to the form
[DTCS BAL] 158.4075 MHz*2 antenna connector through an
· High/Low switch : Low1 attenuator.
· No audio applied to the [MIC] jack.
· DTCS code : 007
· Transmitting



*1IC-F11, F11S, F12 and F12S. *2IC-F11BR only.




5-5
SOFTWARE ADJUSTMENT ­ continued
Select an operation using [] / [] keys, then set specified value using [] / [] keys on the connected computer keyboard.

MEASUREMENT
ADJUSTMENT ADJUSTMENT CONDITION VALUE
UNIT LOCATION
RX 1 · Operating frequency: Top Connect a SINAD meter with an Minimum distortion
SENSITIVITY 146.000 MHz*1 panel 8 load to the [SP] jack. level
[BPF T1]­[BPF T4] 151.505 MHz*2
· Channel spacing :Narrow
· Connect a standard signal generator to
the antenna connector and set as:
Frequency : 146.000 MHz*1
151.505 MHz*2
Level : 10 µV* (­87 dBm)
Modulation : OFF
Deviation : ±1.75 kHz
· Receiving
CONVENIENT: The BPF T1­BPF T4 can be adjusted automatically.
q-1: Set the cursol to "BPF ALL" on the adjustment program and then push [ENTER]
key.
q-2: The connected PC tunes BPF T1­BPF T4 to peak levels.
or
w-1: Set the cursol to one of BPF T1, T2, T3, or T4 as desired.
w-2: Push [ENTER] key to start tuning.
w-3: Repeat w-1 and w-2 to perform additional BPF tuning.
SQUELCH 1 · Operating frequency: Top Connect a SINAD meter with an 12 dB SINAD
LEVEL 160.000 MHz*1 panel 8 load to the [SP] jack.
[SQL] 156.956 MHz*2
· Channel spacing : Wide
· Connect a standard signal generator to
the antenna connector and set as:
Frequency : 160.000 MHz*1
156.956 MHz*2
Level : 0.2 µV* (­121 dBm)
Modulation : 1 kHz
Deviation : ±3.5 kHz
· Receiving
2 · Receiving At the point where
the audio signals
just appears.

*The output level of the standard signal generator (SSG) is indicated as the SSG's open circuit.
*1IC-F11, F11S, F12 and F12S. *2IC-F11BR only.




5-6
SECTION 6 PARTS LIST

[SW-A UNIT] ([F11] AND [F12] ONLY) [MAIN UNIT]
REF ORDER REF ORDER
DESCRIPTION DESCRIPTION
NO. NO. NO. NO.
Q1 1590003020 S.TRANSISTOR XP4216-(TX) Q1 1560001050 S.FET 2SK2974
Q2 1560001020 S.FET 2SK2973 (MTS101P)
Q4 1530003420 S.TRANSISTOR 2SC5110-O (TE85R)
R1 7210003060 VARIABLE TP76N00N-15F-10KA-2251 Q5 1530003310 S.TRANSISTOR 2SC5107-O (TE85R)
R2 7030003380 S.RESISTOR ERJ3GEYJ 331 V (330 ) Q6 1530003310 S.TRANSISTOR 2SC5107-O (TE85R)
R3 7030003410 S.RESISTOR ERJ3GEYJ 561 V (560 ) Q7 1530003310 S.TRANSISTOR 2SC5107-O (TE85R)
Q8 1590000430 S.TRANSISTOR DTC144EUA T106
Q10 1530003230 S.TRANSISTOR 2SC5085-Y (TE85R)
F1 5210000710 S.FUSE KAB 2402 322 NA29 Q11 1530003230 S.TRANSISTOR 2SC5085-Y (TE85R)
Q12 1590001190 S.TRANSISTOR XP6501-(TX) .AB
Q13 1560000540 S.FET 2SK880-Y (TE85R)
DS1