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8SG667 Schematics Revision 1.0
SHEET TITLE
D D
1 COVER SHEET
2 BOM & PCB MODIFY HISTORY
3 BLOCK DIAGRAM
4,5,6 INTEL CPU_WMT_478
7-10 SIS645 (NORTH BRIDGE) HOST; DDR; AGP,HYPER ZIP
11-14 SIS961 (SOUTH BIRDGE)
15 CLOCK GENERATOR (ICS952001)
C C
16,17 DDR SDRAM DIMMS 1,2,3
18 AGP SLOT
19,20 PCI SLOT 1,2,3,4,5,6
21 IDE,FRONT USB,PCIRST#
22 LPCIO_IT8705
23 BIOS
24 COM,PRT,FDD,KB/MS,IR
B B
25 AUDIO (CT5880)/AC 97
26 AUDIO JACK,GAME PORT
27 FAN, SMB PORT
28 PANEL,STR LED,FANS ,CPU GN
29 VCORE PHASE PWM HIP 6302 + 6602
30 DDR POWER,3VDUAL,VDDQ DC POWER PCB Size: 304*200 mm
COMPONENT SIDE
(1 oz. Copper)
31 ATX CONN, GPIO LIST VCC LAYER
(1 oz. Copper)
A
GND LAYER A
(1 oz. Copper)
32 RTL8100BL SOLDER SIDE
(1 oz. Copper)
GIGABYTE
Title
COVER SHEET
Size Document Number Rev
Custom
GA-8SG667 1.0
Date: Wednesday, September 04, 2002 Sheet 1 of 32
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Model Name: 8SG667 Circuit or PCB layout change
for next version
Version:1.0 Date Change Item Reason
D D
Component value change AUTOBOM
history 91/ /
Date Change Item Reason
R73,R475,R802 Change Fix DDR Power control circuit margin
91/08/21 10B Value (1.0A-->1.0B)
R2 change from 75 ohm Fix chamber burn-in fail issue
91/08/27 10C to 150 ohm
C229 change from 10n to Fix some ATI(R300) can't boot issue
91/08/28 10D 1U
91/08/30 Add a lebel
10D_ECN1 (12LC2-04R970-00)